MEEP implements a systolic array shell or template that provides standard coprocessor and memory interfaces. Thus, using the systolic array shell, MEEP enables multiple systolic co-processor designs. MEEP will demonstrate to different systolic arrays, one targeting video and image processing and the other targeting neural network acceleration.
Addressing target audiences and expressing needs
- Use of research Infrastructure
- Collaboration
- Fellowship to advance my/our research
we are looking for early adopters, uses cases, private and public companies/institutions in Risc-v business manufacturing
- Public or private funding institutions
- Research and Technology Organisations
- Academia/ Universities
R&D, Technology and Innovation aspects
Current: It is expected to be integrated into MEEP platform so it can be exploited along emulator platform
Next: Use as standalone accelerator also. Planned to be used in conjunction with another core in internal project TUBITAK

